I get asked pretty often about how to get into FPGA design or how to become a good or even great FPGA developer. Since I get asked quite often, I decided to put my thoughts down here instead of typing it out again and again forever. I hope what I write here will help you on your journey. I think some of the content might be useful to non-FPGA developers even though I don’t really plan for it to be as such.
This article is meant for readers who have already made it through their first FPGA course, maybe they are in a masters program or they might be in the first few years of their new job as an FPGA developer. It is not really meant for beginners but might be useful for them none the less.
During the academic year of 2016-2017 at McMaster University, in conjunction with Dr. DeBruin, Christina Riczu, Thomas Phan and Emilie Corcoran, we developed a compact, battery powered, 12-lead electro-cardiogram. The project won 1st place in the biomedical category at the ECE Capstone Poster Day.
The final report we handed in for the course is attached at the end of this post and includes background information, a design overview, schematics and bill of materials for the hardware we developed. This post will introduce the project and serve as a personal account of the considerations and problems associated with the portion of the project that I focused on.
Previously, I wrote about the Cypress PSoC5LP microcontroller that I have been playing with. The CY8C5888LTI-LP097 on the CY8CKIT-059 dev-kit can be used to make a very crude radio transmitter. Today I will be explaining how to make some simple transmissions from a PSoC to a computer equipped with an RTL-SDR and SDR# acting as our radio receiver. We will be using configurable digital hardware to create the transmitter.
NOTE: If you decide to recreate my experiment, you should take a look at your country’s regulations for radio communicating devices. For example, the FCC in the United States allows hobbyists to create and operate up to 5 low power devices without a license as long as you follow some rules. Still, be responsible and don’t operate this for any longer then you need to know it works.
I recently picked up a Cypress CY8CKIT-059 to play with for about $10 from Mouser. The kit contains a CY8C5888LTI-LP097 chip that features an ARM Cortex M3 that can run up to 80 Mhz, pretty run of the mill. However, the chip also features a small amount of CPLD resources and configurable datapaths that can be used to implement any digital logic that you can fit in. Cypress calls these blocks universal digital blocks. You can implement your own logic blocks in Verilog or use Cypress’s IP cores that are included with PSoC Creator. The idea is to avoid predefining how many UART, I2C, SPI or other interfaces to include which gives you more freedom to choose the combinations of peripherals you need rather than using pin muxes like on Microchip PIC’s and Atmel AVR’s for example. With the PSoC 5LP you can have 5 UARTs if you wanted and you can put those UARTs on any GPIO pin you want.
Listening to stereo music through headphones has never sounded quite right to me. The extreme stereo separation can cause headaches for me when using headphones for more than an hour. Some people report experiencing “pressure” in their ears when using headphones This discomfort could simply be due to how unnatural headphone listening is; no sound from the left channel makes it to your right ear and vice versa. There are some tricks that can be used to get rid of these problems but before I show you how you can try out these tricks let’s get into the math and science behind head related transfer function (HRTF) and how they are used to simulate the way sound travels to our ears resulting in a better listening experience when using headphones with stereo content or even create what is known as virtual surround sound. Continue reading Head Related Transfer Functions and Headphone Listening→